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Book Cover
E-book
Author Parab, Jivan S., author

Title Hands-on experience with Altera FPGA development boards / Jivan S. Parab, Rajendra S. Gad, G.M. Naik
Published New Delhi, India : Springer, [2018]

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Description 1 online resource (xii, 150 pages)
Contents Foreword -- Preface -- Contents -- About the Authors -- 1 Genesis of PLDâ#x80;#x99;s, Market Players, and Tools -- Abstract -- 1.1 Brief Insight of Microprocessor, Microcontroller and PLDâ#x80;#x99;s -- 1.1.1 Selection of Technology Based on Application -- 1.2 Family Tree of PLDs -- 1.2.1 When to Choose a PLD? -- 1.2.1.1 Tips on Choosing PLA, PAL, CPLD, and FPGAs -- 1.3 Major Players in the Market and Their Product Specialties -- 1.3.1 Overview of Xilinx Products (www.Xilinx.com) -- 1.3.2 Overview of Altera Products (www.altera.com)
1.3.3 Overview of Lattice (http://www.latticesemi.com/)1.3.4 Overview of QuickLogic (www.Quicklogic.com) -- 1.4 Overview of Software Tools -- 1.4.1 Programming Aspects of VHDL -- 1.4.2 Programming Aspects of Verilog -- 1.4.3 Programming Aspects of ABEL -- 2 Getting Hands on Altera® Quartus® II Software -- Abstract -- 2.1 Installation of Software -- 2.2 Setting Up of License -- 2.3 Creation of First Embedded System Project -- 2.4 Project Building and Compilation -- 2.5 Programming and Configuring the FPGA Device -- 3 Building Simple Applications with FPGA
Abstract3.1 Implementation of 8:1 Multiplexer -- 3.2 Implementation of Encoder/Decoder and Priority Encoder -- 3.3 Universal Shift Register -- 3.4 4-Bit Counter -- 3.5 Implementation of Memory -- 3.6 Traffic Light Controller -- 4 Building Embedded Systems Using Soft IP Cores -- Abstract -- 4.1 Concept of Soft IPs -- 4.2 Soft Core Processors for Embedded Systems -- 4.3 A Survey of Soft Core Processors -- 4.3.1 Commercial Cores and Tools -- 4.3.2 Open-Source Cores -- 4.3.3 Comparison of Soft Core Processors -- 4.4 Soft Processor Cores of Altera
4.5 Design Flow5 How to Build First Nios II System -- Abstract -- 5.1 Creating the Advanced Quartus II Project -- 5.2 Creation and Generation of NIOS II System by Using SOPC Builder -- 5.3 Nios II System Integration into a Quartus II Project -- 5.4 Programming and Configuration Cyclone II Device on the DE2 Board -- 5.5 Creating C/C++ Program Using Nios II IDE -- 5.5.1 Introduction -- 5.6 Running and Testing It on Target Board -- 6 Case Studies Using Altera Nios II -- Abstract -- 6.1 Blinking of LEDs in Different Patterns -- 6.2 Display of Scrolling Text on LCD
6.3 Interfacing of Digital Camera6.4 Multiprocessor Communication for Parallel Processing -- 6.5 Robotic ARM Controlled Over Ethernet -- 6.6 Multivariate System Implementation -- 6.7 Matrix Crunching on Altera DE2 Board
Summary Annotation This book is built around the use of readymade soft processor cores for FPGA design. In particular, the book focuses on Altera FPGA boards. The book explores many different embedded systems needs and prepares its readers for hands-on design and development of such systems. Many worked-out examples and case studies have been included to enable a clear understanding of design concepts. Primarily designed as a textbook for core or lab courses on FPGA based embedded systems, this book will appeal to students and instructors alike. The book takes an autodidactic approach, which also makes it suitable for hobbyists and practitioners looking to acquaint themselves with Altera FPGA boards
Notes Print version record
Subject Gate array circuits.
Field programmable gate arrays.
Programmable array logic.
Routers (Computer networks)
TECHNOLOGY & ENGINEERING -- Engineering (General)
TECHNOLOGY & ENGINEERING -- Reference.
TECHNOLOGY & ENGINEERING -- Mechanical.
Field programmable gate arrays
Gate array circuits
Programmable array logic
Routers (Computer networks)
Form Electronic book
Author Gad, Rajendra S., author
Naik, G. M., author
ISBN 9788132237693
8132237692
8132237676
9788132237679