Description |
1 online resource (xviii, 219 pages : illustrations |
Contents |
Introduction -- The LEON3 Processor -- Microthreaded Extensions -- The Basic UTLEON3 Architecture.- UTLEON3 Programming by Example -- UTLEON3 Implementation Details -- Execution Effieciency of the Microthread Pipeline.- Hardware Families of Threads -- I/O and Interrupt Handling in the Microthread Mode -- The IU3 Pipeline -- Excerpts from the LEON3 Instruction Set -- Relevant LEON3 Registers and Address Space Identifiers.- Scheduler Example -- Used Resources -- Tutorial |
Summary |
This book describes a specification, microarchitecture, VHDL implementation and evaluation of a SPARC v8 CPU with fine-grain multi-threading, called micro-threading. The CPU, named UTLEON3, is an alternative platform for exploring CPU multi-threading that is compatible with the industry-standard GRLIB package. The processor microarchitecture was designed to map in an efficient way the data-flow scheme on a classical von Neumann pipelined processing used in common processors, while retaining full binary compatibility with existing legacy programs |
Analysis |
engineering |
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circuits |
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procesarchitectuur |
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process architecture |
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elektronica |
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electronics |
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instrumentatie |
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instrumentation |
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Engineering (General) |
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Techniek (algemeen) |
Bibliography |
Includes bibliographical references and index |
Notes |
English |
Subject |
Computer architecture.
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Simultaneous multithreading processors.
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Field programmable gate arrays.
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Threads (Computer programs)
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COMPUTERS -- Systems Architecture -- General.
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Simultaneous multithreading processors
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Computer architecture
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Electronic circuits
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Electronics
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Engineering
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Field programmable gate arrays
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Microelectronics
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Microprocessors
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Threads (Computer programs)
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Form |
Electronic book
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Author |
Kafka, Leoš; author
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Kohout, Lukáš; author
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Sýkora, Jaroslav, author
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Bartosiński, Roman, author
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ISBN |
9781461424093 |
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1461424097 |
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9781461424109 |
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1461424100 |
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1283740451 |
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9781283740456 |
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