Title CMOS SRAM circuit design and parametric test in nano-scaled technologies : process-aware SRAM design and test / Andrei Pavlov, Manoj Sachdev

Published [Dordrecht] : Springer, ©2008

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Description 1 online resource (xvi, 193 pages) : illustrations Series Frontiers in electronic testing ; 40 Frontiers in electronic testing ; 40. Contents And Motivation -- SRAM Circuit Design and Operation -- SRAM Cell Stability: Definition, Modeling and Testing -- Traditional SRAM Fault Models and Test Practices -- Techniques for Detection of SRAM Cells with Stability Faults -- Soft Errors in SRAMs: Sources, Mechanisms and Mitigation Techniques Summary As technology scales into nano-meter region, design and test of Static Random Access Memories (SRAMs) becomes a highly complex task. Process disturbances and various defect mechanisms contribute to the increasing number of unstable SRAM cells with parametric sensitivity. Growing sizes of SRAM arrays increase the likelihood of cells with marginal stability and pose strict constraints on transistor parameters distributions. Standard functional tests often fail to detect unstable SRAM cells. Undetected unstable cells deteriorate quality and reliability of the product as such cells may fail to retain the data and cause a system failure. Special design and test measures have to be taken to identify cells with marginal stability. However, it is not sufficient to identify the unstable cells. To ensure reliable system operation, unstable cells have to be repaired. CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies covers a broad range of topics related to SRAM design and test. From SRAM operation basics through cell electrical and physical design to process-aware and economical approach to SRAM testing. The emphasis of the book is on challenges and solutions of stability testing as well as on development of understanding of the link between the process technology and SRAM circuit design in modern nano-scaled technologies Bibliography Includes bibliographical references and index Notes English Print version record Subject Metal oxide semiconductors, Complementary -- Design Random access memory. Nanoelectronics. TECHNOLOGY & ENGINEERING -- Electronics -- Semiconductors. TECHNOLOGY & ENGINEERING -- Electronics -- Solid State. Ingénierie. Metal oxide semiconductors, Complementary -- Design Nanoelectronics Random access memory Form Electronic book Author Sachdev, Manoj. ISBN 9781402083631 1402083637 9781402083624 1402083629 128149223X 9781281492234 9786611492236 6611492232

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