FD-SOI Device and Process Technologies -- Ultralow-Power Circuit Design with FD-SOI Devices -- 0.5-V MTCMOS/SOI Digital Circuits -- 0.5-1V MTCMOS/SOI Analog/RF Circuits -- SPICE Model for SOI MOSFETs -- Applications -- Prospects for FD-SOI Technology
Summary
"The most important issue confronting CMOS technology is the power explosion of chips arising from the scaling law. Fully-depleted (FD) SOI technology provides a promising low-power solution to chip implementation. Ultralow-power VLSIs, which have a power consumption of less than 10 mW, will be key components of terminals in the coming ubiquitous-IT society. Fully-Depleted SOI CMOS Circuits and Technology for Ultralow-Power Applications addresses the problem of reducing the supply voltage of conventional circuits for ultralow-power operation and explains power-efficient MTCMOS circuit design for FD-SOI devices at a supply voltage of 0.5 V."--Jacket
Analysis
engineering
circuits
computer hardware
computertechnieken
computer techniques
elektrotechniek
electrical engineering
elektronica
electronics
instrumentatie
instrumentation
ontwerp
design
Engineering (General)
Techniek (algemeen)
Notes
"The most important issue confronting CMOS technology is the power explosion of chips arising from the scaling law. Fully-depleted (FD) SOI technology provides a promising low-power solution to chip implementation. Ultralow-power VLSIs, which have a power consumption of less than 10 mW, will be key components of terminals in the coming ubiquitous-IT society"--Page 4 of cover
