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Author Advanced Research Working Conference on Correct Hardware Design Methodologies (1995 : Frankfurt am Main, Germany)

Title Correct Hardware Design and Verification Methods : IFIP WG 10.5 Advanced Research Working Conference, CHARME '95 Frankfurt/Main, Germany, October 2-4, 1995 Proceedings / edited by Paolo E. Camurati, Hans Eveking
Published Berlin, Heidelberg : Springer-Verlag, 1995


Description 1 online resource : v.: digital
Series Lecture Notes in Computer Science, 0302-9743 ; 987
Lecture notes in computer science ; 987. 0302-9743
Contents What if model checking must be truly symbolic / H. Hungar [and others] -- Automatic verification of the SCI cache coherence protocol / U. stern, D.L. Dill -- Describing and verifying synchronous circuits with the Boyer-Moore theorem prover / L. Pierre -- Problems encountered in the machine-assisted proof of hardware / P. Curzon -- Formally embedding existing high level synthesis algorithms / D. Eisenbiegler, R. Kumar -- Formal design of a class of computers / L.G. Wang, M. Mendler -- Symbolic analysis and verification of CPA descriptions / M.C. McFarland, T.J. Kowalski -- A foundation for formal reuse of hardware / A.C.V. de Melo, H. Barringer -- State enumeration with abstract descriptions of state machines / F. Corella [and others] -- Transforming boolean relations by symbolic encoding / G. Cabodi [and others] -- Design error diagnosis in sequential circuits / A. Wahba, D. Borrione -- Timing analysis of asynchronous circuits using timed automata / O. Maler, A. Pnueli -- Improved probabilistic verification by hash compaction / U. Stern, D.L. Dill -- Formal support for the ELLA hardware description language / H. Barringer, B. Monahan, A. Williams -- Verifying hardware components within JACK / R. De Nicola [and others] -- Language containment of non-deterministic [omega]-automata / S. Taşiran, R. Hojati, R.K. Brayton -- A partial-order approach to the verification of concurrent systems : checking liveness properties / D. Bolignano -- Semantics of a verification-oriented subset of VHDL / D. Déharbe, D. Borrione -- Reasoning about VHDL using operational and observational semantics / K.G.W. Gossens -- A symbolic relation for a subset of VHDL '87 descriptions and its application to symbolic model checking / E. Encrenaz
Summary This book constitutes the refereed proceedings of the IFIP WG10.5 Advanced Research Working Conference on Correct Hardware Design Methodologies, CHARME '95, held in Frankfurt, Germany, in October 1995. The 20 revised full papers presented were carefully selected by the program committee and address all current aspects of research and advanced applications in the field of formal verification of hardware. Among the topics covered are model checking, theorem proving, formally verified synthesis, process algebras, finite state systems, verification environments, language containment, and VHDL
Bibliography Includes bibliographical references
Subject Engineering.
Data transmission systems.
Software engineering.
Logic design.
Computer-aided design -- Congresses
Integrated circuits -- Verification -- Congresses
Integrated circuits -- Very large scale integration -- Design and construction -- Data processing -- Congresses
Computer-aided design
Data transmission systems
Integrated circuits -- Verification
Integrated circuits -- Very large scale integration -- Design and construction -- Data processing
Logic design
Software engineering
Genre/Form Conference papers and proceedings
Form Electronic book
Author Camurati, Paolo.
Eveking, Hans.
ISBN 9783540455165