| Description |
1 online resource (xvii, 239 pages) : illustrations |
| Series |
Frontiers in electronic testing |
|
Frontiers in electronic testing.
|
| Contents |
Cover -- Table of Contents -- Foreword -- Preface -- Chapter 1 Technology Overview -- Embedded Test -- DFT Methods Used in Embedded Test -- Capabilities of icBIST -- References -- Chapter 2 Memory Test and Diagnosis -- Overview -- Difficulties in Testing Embedded Memories -- BIST for Embedded Memories -- Diagnosis -- References -- Chapter 3 Logic Test and Diagnosis -- Circuit Preparation -- Logic BIST Building Blocks -- Logic Test Configurations and Diagnosis -- Timing Issues and Solutions During Logic Test -- References -- Chapter 4 Embedded Test Design Flow -- Overview of the Design Flow -- Overview of the Tool Set -- Adding Embedded Test to a Sub-Block -- Preparing the Top-Level Logic Block -- Adding Embedded Test to the Top Level of the Chip -- Chapter 5 Hierarchical Core Test -- Testing Cores -- Hierarchical Embedded Core Test Solution -- Embedded Logic Test Architecture -- Design Flow -- Summary -- References -- Chapter 6 Test and Measurement for PLLs and ADCs -- Testing PLLs -- Measurements for PLLs -- Test Times -- Assumptions for Testing PLLs -- Testing ADCs -- Measurements for ADCs -- Assumptions for Testing ADCs -- References -- Chapter 7 System Test and Diagnosis -- At-Speed Interconnect Testing -- At-Speed Memory Testing -- Fault Insertion -- References -- Chapter 8 System Reuse of Embedded Test -- Embedded Test -- Board and System Embedded Test Primer -- Benefits of Using Embedded Test -- General Embedded Test Controller Ar -- Board-Level Test Access -- In-System Card Test Access -- System-Level Test Access -- Sample Embedded Test Flows -- References -- Glossary |
| Summary |
Design for AT-Speed Test, Diagnosis and Measurement is the first book to offer practical and proven design-for-testability (DFT) solutions to chip and system design engineers, test engineers and product managers at the silicon level as well as at the board and systems levels. Designers will see how the implementation of embedded test enables simplification of silicon debug and system bring-up. Test engineers will determine how embedded test provides a superior level of at-speed test, diagnosis and measurement without exceeding the capabilities of their equipment. Product managers will learn how the time, resources and costs associated with test development, manufacture cost and lifecycle maintenance of their products can be significantly reduced by designing embedded test in the product. A complete design flow and analysis of the impact of embedded test on a design makes this book a ̀must read' before any DFT is attempted |
| Bibliography |
Includes bibliographical references |
| Notes |
Print version record |
| Subject |
Integrated circuits -- Testing
|
|
Electronic apparatus and appliances -- Testing.
|
|
TECHNOLOGY & ENGINEERING -- Telecommunications.
|
|
Electronic apparatus and appliances -- Testing
|
|
Integrated circuits -- Testing
|
| Form |
Electronic book
|
| Author |
Nadeau-Dostie, Benoit
|
| LC no. |
99046022 |
| ISBN |
0306475448 |
|
9780306475443 |
|
6610200319 |
|
9786610200313 |
|
