| Description |
1 online resource (xiii, 137 pages) : illustrations |
| Series |
Studies in computational intelligence ; v. 81 |
|
Studies in computational intelligence ; v. 81.
|
| Contents |
Literature Survey -- Design and Development of an FPGA-based Robot -- Hardware-Efficient Robotic Exploration -- Hardware-Efficient Landmark Determination -- The Road Ahead |
| Summary |
Much of the research effort in mobile robots in the recent past has been on sensing and design of time-efficient algorithms for tasks such as localization, mapping and navigation. Mobile robots typically employ an embedded computer for high level computations. As applications of robots expand, there is a need to investigate architecturally efficient choices for this embedded computing platform. In particular, it is valuable to process data to obtain time, space and energy-efficient solutions for various robotic tasks. This book presents hardware-efficient algorithms and FPGA implementations for two robotic tasks, namely exploration and landmark determination. The work identifies scenarios for mobile robotics where parallel processing and selective shutdown offered by FPGAs are invaluable. The book proceeds to systematically develop memory-driven VLSI architectures for both the tasks. The architectures are ported to a low-cost FPGA with a fairly small number of system gates. A robot fabricated with this FPGA on-board serves to validate the efficacy of the approach. Numerous experiments with the robot are reported |
| Bibliography |
Includes bibliographical references and index |
| Notes |
English |
|
Print version record |
| Subject |
Robotics.
|
|
Computational intelligence.
|
|
Space perception -- Data processing
|
|
Robotics
|
|
Ingénierie.
|
|
Computational intelligence
|
|
Robotics
|
| Form |
Electronic book
|
| Author |
Kumar, Panakala Rajesh
|
| ISBN |
9783540753940 |
|
354075394X |
|
9783540753933 |
|
3540753931 |
|
