Introduction; Modeling Permanent Faults; Test Generation: A Symbolic Approach; Test Generation: A Heuristic Approach; Test Generation: A Hierarchical Approach; Test Program Generation from High-level Microprocessor Descriptions; Tackling Concurrency and Timing Problems; An Approach to System-level Design for Test; System-level Dependability Analysis
Summary
"System-level Test and Validation of Hardware/Software Systems provides a state-of-the-art overview of the current validation and test techniques by covering all aspects of the subject including: modeling of bugs and defects; stimulus generation for validation and test purposes (including timing errors); and design for testability." "For researchers working on system-level validation and testing, for tool vendors involved in developing hardware-software co-design tools and for graduate students working in embedded systems and SOC design and implementation, System-level Test and Validation of Hardware/Software Systems will be an invaluable source of reference."--Jacket