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E-book
Author Nuyts, Pieter A. J., author

Title Continuous-Time Digital Front-Ends for Multistandard Wireless Transmission / Pieter A.J. Nuyts, Patrick Reynaert, Wim Dehaene
Published Cham : Springer, 2014
Table of Contents
1.Introduction1
1.1.Situation and Motivation1
1.1.1.Towards Software-Defined Radio3
1.1.2.Towards Fully Integrated CMOS Transceivers6
1.1.3.Switched-Mode Power Amplification7
1.1.4.Towards Fully Digital Transmitters8
1.1.5.The Bandpass Filter9
1.1.6.Frequency Range10
1.1.7.Continuous-Time Digital Circuits10
1.1.8.Summary12
1.2.Outline of this Book13
 References14
2.Digital Transmitter Architectures: Overview15
2.1.Modulation15
2.1.1.Traditional Analog Modulation Schemes16
2.1.2.General Modulated Signal and Complex Representation17
2.1.3.Single-Carrier Digital Modulation Schemes18
2.1.4.OFDM21
2.1.5.Conclusion24
2.2.Power Amplifier24
2.2.1.Switched-Mode Power Amplifiers24
2.2.2.Differential PA and Power Combining28
2.3.Modulator Types29
2.3.1.Quadrature Modulator29
2.3.2.Polar Modulator32
2.3.3.Outphasing Modulator35
2.4.Types of 1-bit Coding37
2.4.1.Baseband Delta-Sigma Modulation37
2.4.2.Bandpass Delta-Sigma Modulation40
2.4.3.Baseband PWM41
2.4.4.RF PWM43
2.4.5.Other Coding Schemes45
2.4.6.Multibit Noise Shaping45
2.5.Conclusion46
 References47
3.High-Level Analysis of Fully Digital PWM Transmitters51
3.1.Phase Modulation52
3.1.1.Ideal Phase Modulation53
3.1.2.Phase Modulation on Square Wave54
3.1.3.Effects of Quantization56
3.1.4.Effects of Sampling58
3.1.5.Complete PMC Spectrum60
3.2.General PWM Theory62
3.2.1.Definition of PWM62
3.2.2.Types of Pulse Width Modulators63
3.2.3.Expressions for PWM Signals and Spectra64
3.3.Trailing-Edge Baseband PWM68
3.3.1.Ideal Baseband PWM Spectrum69
3.3.2.Effects of Quantization71
3.3.3.Effects of Sampling72
3.4.Polar Transmitter with Baseband PWM72
3.4.1.Complete Signal Spectrum72
3.4.2.In-Band Noise Terms76
3.4.3.Out-of-Band Distortion Term80
3.4.4.Intermodulation Terms80
3.4.5.Summary88
3.4.6.Simulation Results89
3.5.Double-Edge RF PWM95
3.5.1.Trailing-Edge Versus Double-Edge RF PWM96
3.5.2.Required Transformations on the AM Signal99
3.5.3.Adding Phase Modulation100
3.5.4.Differential RF PWM101
3.5.5.Ideal RF PWM Spectrum103
3.5.6.Effects of Quantization104
3.5.7.Effects of Sampling106
3.6.Polar Transmitter with RF PWM108
3.6.1.Complete Signal Spectrum108
3.6.2.In-Band Noise Terms109
3.6.3.Out-of-Band Distortion Terms111
3.6.4.Summary112
3.6.5.Simulation Results112
3.7.Multilevel PWM117
3.7.1.Multilevel Baseband PWM118
3.7.2.Multilevel RF PWM121
3.8.Conclusion122
 References122
4.Continuous-Time Digital Design Techniques125
4.1.Motivation and Comparison125
4.2.Applications of Continuous-Time Digital Circuits127
4.2.1.Time-to-Digital Conversion127
4.2.2.Digital-to-Time Conversion129
4.2.3.Applications of TDC and DTC Circuits131
4.3.Delay Lines132
4.3.1.The Inverter Chain132
4.3.2.Noninverting Delay Elements134
4.3.3.Differential Delay Elements135
4.3.4.Conclusion136
4.4.Achieving Sub-Gate-Delay Resolution137
4.4.1.Passive Delay Lines137
4.4.2.Resistive Interpolation138
4.4.3.Other Implementations for Sub-Gate-Delay Resolution142
4.5.Tuning the Unit Delay143
4.5.1.Supply Modulation143
4.5.2.Adding a Variable Load144
4.5.3.Adding Control Transistors145
4.5.4.Conclusion146
4.6.Ensuring Correct Delay146
4.6.1.Symmetry and Matching147
4.6.2.Global Process Variations and Locking147
4.6.3.Local Process Variations151
4.6.4.Pulse Swallowing and Pulse Shrinking157
4.7.Basic Building Blocks for Continuous-Time Digital Circuits159
4.7.1.Symmetrical NAND/NOR Gates159
4.7.2.Multiplexer-Based Gates162
4.7.3.XOR Gates163
4.7.4.Multiplexers167
4.8.Design Flow175
4.8.1.High-Level Matlab Model176
4.8.2.Transistor-Level Simulations180
4.8.3.Layout and Parasitic Extraction181
4.8.4.Remark: HDL Simulations182
4.9.Conclusion183
 References183
5.A 65-nm CMOS Fully Digital Reconfigurable Transmitter Front-End for Class-E PA Based on Baseband PWM187
5.1.Architecture Overview187
5.2.Implementation190
5.2.1.Delay Elements190
5.2.2.Locking and Multistandard Support194
5.2.3.Multiplexers196
5.2.4.Symmetrical NAND and NOR Gates198
5.2.5.XOR Gates198
5.2.6.Layout199
5.3.Operating Modes and System Parameters200
5.4.Measurement Results201
5.4.1.Measurements on Transmitter Front-End202
5.4.2.Measurements with Power Amplifier208
5.4.3.Power Consumption215
5.5.Conclusion216
 References217
6.A 40-nm CMOS Fully Digital Reconfigurable Transmitter with Class-D PAs Using Baseband and RF PWM219
6.1.Architecture Overview219
6.1.1.Baseband PWM System219
6.1.2.RF PWM System220
6.1.3.Combined System223
6.2.Implementation224
6.2.1.Delay Elements226
6.2.2.Locking Mechanism228
6.2.3.Multiplexers230
6.2.4.XOR Gates231
6.2.5.Single-Ended to Differential Conversion231
6.2.6.Signal and Clock Gating232
6.2.7.Layout233
6.3.Operating Modes and System Parameters233
6.4.Measurement Results234
6.4.1.Baseband PWM Front-End234
6.4.2.RF PWM Front-End241
6.5.Conclusion253
 References253
7.Conclusions and Future Work255
7.1.Which Transmitter Architecture to Choose?255
7.2.Is Continuous-Time Digital Hardware Necessary?259
7.3.Comparison to State-of-the-Art261
7.4.Future Work266
7.4.1.Digital Transmitter Architectures266
7.4.2.Continuous-Time Building Blocks270
7.4.3.Design Flow273
7.4.4.Spectral Analysis273
 References273
Appendix A Definitions, Conventions and Overview of Used Theory277
Appendix B Derivations and Considerations Regarding PWM297
 Index305

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Description 1 online resource (xxv, 309 pages) : illustrations (some color)
Series Analog Circuits and Signal Processing, 1872-082X
Analog circuits and signal processing series, 1872-082X
Contents Digital Transmitter Architectures: Overview -- High-Level Analysis of Fully Digital PWM Transmitters -- Continuous-time Digital Design Techniques -- A 65-nm CMOS Fully Digital Reconfigurable Transmitter Front-End for Class-E PA based on Baseband PWM -- A 40-nm CMOS Fully Digital Reconfigurable Transmitter with Class-D Pas using Baseband and RF PWM -- Conclusions and Future Work
Summary This book describes the design of fully digital multistandard transmitter front-ends which can directly drive one or more switching power amplifiers, thus eliminating all other analog components. After reviewing different architectures, the authors focus on polar architectures using pulse width modulation (PWM), which are entirely based on unclocked delay lines and other continuous-time digital hardware. As a result, readers are enabled to shift accuracy concerns from the voltage domain to the time domain, to coincide with submicron CMOS technology scaling. The authors present different architectural options and compare them, based on their effect on the signal and spectrum quality. Next, a high-level theoretical analysis of two different PWM-based architectures baseband PWM and RF PWM is made. On the circuit level, traditional digital components and design techniques are revisited from the point of view of continuous-time digital circuits. Important design criteria are identified and different solutions are presented, along with their advantages and disadvantages. Finally, two chips designed in nanometer CMOS technologies are described, along with measurement results for validation
Bibliography Includes bibliographical references and index
Notes Online resource; title from PDF title page (SpringerLink, viewed January 6, 2014)
Print version record
Subject Pulse-duration modulation.
Metal oxide semiconductors, Complementary.
Radio frequency integrated circuits.
TECHNOLOGY & ENGINEERING -- Mechanical.
Ingénierie.
Metal oxide semiconductors, Complementary
Pulse-duration modulation
Radio frequency integrated circuits
Form Electronic book
Author Reynaert, Patrick, author.
Dehaene, Wim, author.
ISBN 9783319039251
3319039253
3319039245
9783319039244